Akura AV26720-HD2 Especificaciones descargar pdf (Pagina 20)

Spectrum Digital, Inc

2-10

TMS320C54XX Evaluation Module Technical Reference

2.2.2 Data Memory

The data memory configuration is shown below. The external data memory is mapped

from 0x8000 to 0xFFFF for the C548 and C549 processors, and either internal or

external for the C5410.

Flash memory is also mapped in data space from 0x8000 to 0xFFFF when the UART

OUT3 (DTR bit in MCR Register) bit is set to 0. This allows for boot loading. The

memory space can be recovered for RAM memory by setting the OUT3 bit to 1.

Note: The logic state of OUT3 is inverted of bit state in the UART register.

Figure 2-4A shows the data space memory map for the C548 and C549 processors.

Hex

0x0000

0x005F

0x0060

0x007F

0x0080

0x1FFF

0x2000

0x7FFF

0x8000

0xFFFF

Memory-Mapped

Registers

Scratch Pad RAM

8K Dual Access

RAM (DARAM)

Single Access

RAM (SARAM)

FLASH ROM (OUT3=0)

External RAM (OUT3=1)

Figure 2-4A, EVM320C548/C549 Data Space

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 ... 44 45

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Akura AV26720-HD2 Especificaciones Pagina 20