
Spectrum Digital, Inc
2-30
TMS320C54XX Evaluation Module Technical Reference
2.10.8 JP7, SYSCLK Option
Jumper JP7 allows the selection of either the rising edge or falling edge of CLKOUT to
generate READY for UART operations. As processor frequencies increase it will be
necessary to pipeline the READY signal. This jumper provides for these requirements.
The table below shows the two positions and their functions:
2.10.9 JP8, AD50 Reference Voltage
The AD50 AIC can supply an internal reference voltage, however for compatibility with
previous versions of the C54xx with the AD50, an external voltage reference is
supplied. Jumper JP8 allows the selection of using the external reference or internal
reference. When position 1-2 is selected the external reference is used. If the 2-3
position is selected the internal reference is used. These selections are shown in the
table below.
Table 23: JP7, SYSCLK Option
Position Function
1-2 Use Inverted CLKOUT for U20 GAL Clock
2-3 Use CLKOUT for U20 GAL Clock
Table 24: JP8, AD50 Reference Voltage
Position Function
1-2 External reference
2-3 Internal reference
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